VR(4)

NAME
vr - VIA VT3043/VT86C100A/VT6105/VT6105M 10/100 Ethernet device

SYNOPSIS
vr* at pci?
amphy* at mii?
icsphy* at mii?
sqphy* at mii?

DESCRIPTION
The vr driver provides support for PCI Ethernet adapters and embedded controllers based on the VIA Technologies VT3043 Rhine I, VT86C100A Rhine II, and VT6105/VT6105M Rhine III Fast Ethernet controller chips. This includes the D-Link DFE-530TX and various other commodity Fast Ethernet cards.

The VIA Rhine chips use bus master DMA and have a software interface designed to resemble that of the DEC 21x4x "tulip" chips. The major differences are that the receive filter in the Rhine chips is much simpler and is programmed through registers rather than by downloading a special setup frame through the transmit DMA engine, and that transmit and receive DMA buffers must be longword aligned. The Rhine chips are meant to be interfaced with external physical layer devices via an MII bus. They support both 10 and 100Mbps speeds in either full or half duplex.

The vr driver for the VT6105M controller supports IPv4 IP/TCP/UDP transmit/receive checksum offload. The vr driver additionally supports Wake on LAN (WoL). See arp(8) and ifconfig(8) for more details.

The vr driver supports the following media types:

autoselect
    Enable autoselection of the media type and options. The user can manually override the autoselected mode by adding media options to the appropriate hostname.if(5) file.

10baseT
    Set 10Mbps operation. The mediaopt option can also be used to select either full-duplex or half-duplex modes.

100baseTX
    Set 100Mbps (Fast Ethernet) operation. The mediaopt option can also be used to select either full-duplex or half-duplex modes.

The vr driver supports the following media options:

full-duplex
    Force full duplex operation.

half-duplex
    Force half duplex operation.

Note that the 100baseTX media type is only available if supported by the adapter.

For more information on configuring this device, see ifconfig(8).

DIAGNOSTICS

vr%d: couldn't map memory A fatal initialization error has occurred.

vr%d: couldn't map interrupt A fatal initialization error has occurred.

vr%d: watchdog timeout The device has stopped responding to the network, or there is a problem with the network connection (cable).

vr%d: no memory for rx list The driver failed to allocate an mbuf for the receiver ring.

vr%d: no memory for tx list The driver failed to allocate an mbuf for the transmitter ring when allocating a pad buffer or collapsing an mbuf chain into a cluster.

vr%d: chip is in D3 power state -- setting to D0 This message applies only to adapters which support power management. Some operating systems place the controller in low power mode when shutting down, and some PCI BIOSes fail to bring the chip out of this state before configuring it. The controller loses all of its PCI configuration in the D3 state, so if the BIOS does not set it back to full power mode in time, it won't be able to configure it correctly. The driver tries to detect this condition and bring the adapter back to the D0 (full power) state, but this may not be enough to return the driver to a fully operational condition. If this message appears at boot time and the driver fails to attach the device as a network interface, a second warm boot will have to be performed to have the device properly configured.

Note that this condition only occurs when warm booting from another operating system. If the system is powered down prior to booting OpenBSD, the card should be configured correctly.

SEE ALSO
amphy(4), arp(4), icsphy(4), ifmedia(4), intro(4), netintro(4), pci(4), sqphy(4), hostname.if(5), ifconfig(8) The VIA Technologies VT86C100A data sheet, http://www.via.com.tw.

HISTORY
The vr device driver first appeared in FreeBSD 3.0. OpenBSD support first appeared in OpenBSD 2.5.

AUTHORS
The vr driver was written by Bill Paul <wpaul@ctr.columbia.edu>.

BUGS
The vr driver always copies transmit mbuf chains into longword-aligned buffers prior to transmission in order to pacify the Rhine chips. If buffers are not aligned correctly, the chip will round the supplied buffer address and begin DMAing from the wrong location. This buffer copying impairs transmit performance on slower systems but can't be avoided. On faster machines (e.g., a Pentium II), the performance impact is much less noticeable.